期刊
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY
卷 1, 期 10, 页码 1523-1532出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCPMT.2011.2162837
关键词
Alignment accuracy prediction; flip-chip assembly; model; self-alignment
类别
资金
- Intel Corporation [OCG4979B]
We describe a 3-D model for predicting the self-alignment accuracy of solder flip-chip assemblies. The model was developed using a force optimization method based on an explicit regression model, and validated experimentally using flip-chip test vehicles. The experimental results correlate with the model prediction to within 3% for the lateral alignment and 2% for the standoff height. The effects of important manufacturing parameters such as solder volume variations and distributions, chip mass, and die tilt, on the post-assembly alignment accuracies were investigated and characterized with the model. This model can be used to aid in the design of flip-chip assemblies requiring high alignment accuracies, such as those found in optoelectronics packaging.
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