Article
Engineering, Electrical & Electronic
Sufen Wei, Guohe Zhang, Li Geng, Zhibiao Shao, Cheng-Fu Yang
Summary: This paper presents two novel silicon-on-insulator tunnel field-effect transistors (SOI-TFETs), a lateral dual-gate TFET and a lateral triple-gate TFET, which demonstrate higher on-state current and lower off-state current due to the modulation effect of multiple gate voltages on the channel barrier. Comparison reveals that the lateral triple-gate TFET outperforms the dual-gate TFET in terms of on-state current and off-state current.
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS
(2021)
Article
Materials Science, Multidisciplinary
N. Nagendra Reddy, Deepak Kumar Panda
Summary: The study focused on the performance of overlapped gate-on-drain GAA-TFET biosensors by incorporating dielectric modulated technique for immobilizing targeted biomolecules in the cavity region, resulting in higher sensitivity and lower leakage compared to other TFET structures.
APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING
(2021)
Article
Engineering, Electrical & Electronic
Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah, Rajesh Saha, Kavindra Kandpal
Summary: This article investigates the response of a silicon-on-insulator tunnel field-effect transistor (TFET) to semiconductor/gate dielectric interface traps. The analysis considers different parameters related to the gate of the device and explores the effects of acceptor-like and donor-like traps on the device's characteristics. It also examines the impact of temperature on interface traps and gate leakage current. The study finds that the gate electrode plays a crucial role in determining the TFET's sensitivity. Furthermore, noise spectral densities with various noise sources and interface traps are reported.
JOURNAL OF MICROMECHANICS AND MICROENGINEERING
(2022)
Article
Chemistry, Physical
Manshi Kamal, Dharmendra Singh Yadav
Summary: This study investigates the effects of temperature variation on HGO-DW-SCTFET, showing that the device performs better at different temperatures and can be used for high temperature applications.
Article
Engineering, Electrical & Electronic
Chia-Jung Tsai, Xin-Rong You, Meng-Hsuan Tsai, Yue-Ming Hsin
Summary: In this study, a normally-off AlGaN/GaN metal-insulator-semiconductor field-effect transistor (MIS-FET) based on the combination of tri-gate and recessed MIS gate is fabricated and characterized. The recessed tri-gate MIS-FET demonstrates high performance with a high threshold voltage, high drain current, high on/off current ratio and low on-resistance, indicating promising application for normally-off operation of GaN high electron mobility transistors.
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
(2022)
Article
Engineering, Electrical & Electronic
Bin Lu, Dawei Wang, Yan Cui, Zhu Li, Guoqiang Chai, Linpeng Dong, Jiuren Zhou, Guilei Wang, Yuanhao Miao, Zhijun Lv, Hongliang Lu
Summary: The nanowire gate-all-around structure demonstrates superior performance in terms of short channel effects and scaling capability. Development of tunneling current and capacitance models for nanowire FETs has facilitated circuit-level simulations, confirming the efficiency and compatibility of the models. The successful implementation of the models in circuit simulators validates their usefulness for further exploration of nanowire-based TFET circuits.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Chemistry, Physical
Shashi Bala, Harpal Singh, Priyanka Kamboj, Balwant Raj
Summary: This paper highlights the reduction in ambipolar current in nanoscale TFET by controlling various parameters, such as gate-drain overlapping and irregular gate overlap on drain. The effects of device parameters on drain current have been observed through simulation, and the performance of TFET at charge density for biomolecule sensing applications has been examined.
Article
Physics, Multidisciplinary
Zi-Miao Zhao, Zi-Xin Chen, Wei-Jing Liu, Nai-Yun Tang, Jiang-Nan Liu, Xian-Ting Liu, Xuan-Lin Li, Xin-Fu Pan, Min Tang, Qing-Hua Li, Wei Bai, Xiao-Dong Tang
Summary: This study introduces dual-metal gate and gate-drain underlap designs to reduce ambipolar currents in C-shaped pocket TFET (CSP-TFET) devices. The effects of gate work function and gate-drain underlap length on the device's characteristics and performance are analyzed. The results show that the proposed CSP-DMUN-TFET design effectively suppresses ambipolar currents while maintaining high on-state currents, making it a potential replacement for future semiconductor devices.
Article
Engineering, Electrical & Electronic
Fahimul Islam Sakib, Md Azizul Hasan, Mainul Hossain
Summary: A nanoscale biosensor based on negative capacitance gate-all-around tunnel field-effect transistor (NC-GAA-TFET) is proposed for high sensitivity and label-free detection. The sensor shows significant improvement in current sensitivity compared to traditional devices, with the ability to detect biomolecules and pH changes while maintaining low power consumption and high signal-to-noise ratio.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Engineering, Electrical & Electronic
Weizhong Chen, Zikai Wei, Hongsheng Zhang, Yi Huang, Zhengsheng Han
Summary: A novel SBP-LTIGBT with a self-biased pMOS has been proposed and investigated. It shows the same electrical characteristics as conventional LTIGBT during forward conduction state, and automatically turns on with reduced saturation current during switching state. By staying turned on, it reduces turn-off loss and improves the tradeoff relationship between forward conduction voltage and turn-off loss. Additionally, it has extended short-circuit tolerance time and reduced EOFF compared to other LTIGBT designs.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2023)
Article
Chemistry, Physical
Avtar Singh, Chandan Kumar Pandey
Summary: Introducing gate-source overlapping in the GAA Si-NTTFET structure can improve its electrical characteristics, increase on-state current, reduce turn-on voltage, decrease supply voltage, lower standby power dissipation, and reduce ambipolar current, making it more suitable for digital circuit applications.
Article
Engineering, Electrical & Electronic
Nelaturi Nagendra Reddy, Deepak Kumar Panda
Summary: This article investigates a dielectric modulated triple metal gate-oxide-stack Z-shaped gate horizontal source pocket tunnel field-effect transistor (DM-TMGOS-ZHP-TFET) structure for label-free biosensor application. Gate work function engineering and gate-oxide-stack approach are explored for the ZHP-TFET, creating an asymmetric nano-cavity for immobilizing target biomolecules. The device sensitivity is thoroughly studied with variations in dielectric constant inside the nano-gap, and different combinations of metal work functions are used to match desired features. Comparative analysis shows that the DM-TMGOS-ZHP-TFET biosensor outperforms the SMG-ZHP-DM-TFET biosensor in terms of current ratio sensitivity and subthreshold characteristics.
JOURNAL OF MICROMECHANICS AND MICROENGINEERING
(2022)
Article
Engineering, Electrical & Electronic
Xin Chao, Chengkang Tang, Chen Wang, JingJing Tan, Li Ji, Lin Chen, Hao Zhu, QingQing Sun, David Wei Zhang
Summary: This study systematically investigates the time-dependent threshold voltage (V-TH) instability of p-GaN gate high electron mobility transistors (HEMTs) under OFF-state drain stress. An anomalous V-TH shift behavior is observed, with an initial negative shift followed by a kink and a positive shift upon prolonged stress time. The primary reason for the negative V-TH shift in the initial stage is found to be the process of electron releasing by donor states at the p-GaN/AlGaN and AlGaN/GaN interface. The hole deficiency in the p-GaN layer gradually dominates the change in V-TH and finally leads to a positive V-TH shift. A continual leakage path between the gate and drain terminal during the stress stage, mainly due to trap-assisted electron tunneling across the AlGaN layer, is also revealed. Additionally, the trapped electrons at the passivation/AlGaN interface and/or in the GaN buffer layer result in the degradation of static ON-resistance (R-ON) under OFF-state drain stress.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Computer Science, Hardware & Architecture
B. V. V. Satyanarayana, M. Durga Prakash
Summary: This study proposes a design of GOS-HEFET with lower Subthreshold Swing on Silicon on Insulator to achieve perfect scaling. The design utilizes Si-based tunnel devices for tunneling operation and incorporates different materials in the source and channel to enhance tunneling rate and minimize ambipolar leakage.
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
(2021)
Article
Chemistry, Physical
Tanu Wadhera, Girish Wadhwa, Tarun Kumar Bhardwaj, Deepti Kakkar, Balwinder Raj
Summary: This research introduces a dielectric modulation based Triple Gate Doping Less Tunnel Field Effect Transistor (TG-DLTFET) biosensor with an improved device structure for high sensitivity and low short channel effects. By varying the geometric parameters of the device, a higher current switching ratio can be achieved to enhance sensor performance.
Article
Engineering, Electrical & Electronic
Julia C. S. Sousa, Welder F. Perina, Roberto Rangel, Eddy Simoen, Anabela Veloso, Joao A. Martino, Paula G. D. Agopian
Summary: In this study, a Gate-All-Around Nanosheet transistor (GAA-NSH) was used to design an operational transconductance amplifier (OTA) operating from room temperature to 200 degrees C. The GAA-NSH design showed improved performance compared to FinFET and Tunnel FET (TFET) designs in terms of voltage gain, power consumption, and area footprint.
SOLID-STATE ELECTRONICS
(2022)
Article
Engineering, Electrical & Electronic
Vanessa C. P. A. Silva, Joao A. Martino, Eddy Simoen, Anabela Veloso, Paula G. D. Agopian
Summary: In this study, the analog characteristics of gate-all-around nanosheet transistors at high temperatures were analyzed. The nanosheet transistors showed lower short channel effect and higher intrinsic voltage gain compared to nanowire transistors. The study also investigated the analog characteristics of nanosheet transistors with different metal gate stacks, and promising results were obtained.
SOLID-STATE ELECTRONICS
(2022)
Article
Engineering, Electrical & Electronic
Rodrigo do Nascimento Toledo, Wenita de Lima Silva, Walter Goncalez Filho, Alexandro de Moraes Nogueira, Joao Antonio Martino, Paula Ghedini Der Agopian
Summary: This paper presents a comparison of Low-Dropout Voltage Regulators (LDOs) designed with Nanowire (NW-TFET) and Line Tunnel FET (Line-TFET). The experimental results show that both TFET LDOs can achieve stability without the need for compensation capacitors, with the Line-TFET LDO delivering better specifications but consuming more current compared to the NW-TFET LDO.
SOLID-STATE ELECTRONICS
(2022)
Article
Engineering, Electrical & Electronic
Carlos Augusto Bergfeld Mori, Koen Martens, Eddy Simoen, Pol Van Dorpe, Paula Ghedini Der Agopian, Joao Antonio Martino
Summary: In this study, electrolytically gated SOI pFinFETs were successfully used as bioFETs for detecting single-stranded DNA, and their low-frequency noise was evaluated in the range of 1 Hz to 100 Hz. The analysis showed that devices with gates biased around the threshold voltage exhibited the highest signal to noise ratio, with little dependence on the channel length.
SOLID-STATE ELECTRONICS
(2022)
Article
Engineering, Electrical & Electronic
Bruno Godoy Canales, Welder Fernandes Perina, Joao Antonio Martino, Eddy Simoen, Uthayasankaran Peralagu, Nadine Collaert, Paula Ghedini Der Agopian
Summary: This paper investigates the characteristics of the MISHEMT device, focusing on the impact of multiple conductions on the intrinsic voltage gain. The study reveals that the total drain current of the device consists of three different components, leading to double drain voltage saturation and a double plateau in the output characteristics' saturation region. This behavior is influenced by the gate voltage, and therefore, the extraction of the output characteristics and analog parameters is bias-dependent. Furthermore, it is found that the intrinsic voltage gain increases in the second plateau where HEMT conduction dominates.
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
(2023)
Article
Engineering, Electrical & Electronic
Rodrigo do Nascimento Toledo, Joao Antonio Martino, Paula Ghedini Der Agopian
Summary: This work presents hybrid low-dropout voltage regulators (LDO) designed with tunnel field-effect transistor (TFET) - metal-oxide semiconductor field-effect transistor (MOSFET) nanowire (NW) technologies. The devices were modeled using Verilog-A with lookup tables based on experimental data. The hybrid regulators combine NW-MOSFETs for high load current delivery and NW-TFETs for high gain and low power consumption. Two hybrid LDOs with different onset voltages were proposed. The Hybrid-ΔV LDO exhibited the best loop gain and low quiescent current, while the Hybrid-LS LDO showed good gain-bandwidth product. The use of TFET-MOSFET NW technologies enables LDOs with ultra-low power consumption and high loop gain.
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
(2023)
Article
Engineering, Electrical & Electronic
V. C. P. Silva, J. A. Martino, E. Simoen, A. Veloso, P. G. D. Agopian
Summary: This study experimentally evaluates the performance of n-type gate-all-around vertically stacked nanosheet field effect transistors (NSFETs) with different gate lengths at various temperatures, focusing on their use in analog applications. The results show that the shorter transistors have better performance in analog applications. Additionally, as the temperature decreases, the carrier mobility and subthreshold swing of the transistors improve.
SOLID-STATE ELECTRONICS
(2023)
Proceedings Paper
Engineering, Electrical & Electronic
Welder F. Perina, Joao A. Martino, Paula G. D. Agopian
Summary: This work experimentally evaluates the multiple conductions of a GaN based MISHEMT in a temperature range from 200K to 450K, observing the changes in threshold voltage, subthreshold swing, and transconductance at different temperatures.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Arllen D. R. Ribeiro, Gustavo V. Araujo, Joao A. Martino, Paula G. D. Agopian
Summary: This paper analyzes the influence of uniaxially strained silicon on two-stage operational transconductance amplifiers designed with SOI FinFETs. The strain design improves the circuit performance by enhancing mobility, resulting in higher voltage gain and gain-bandwidth product.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Wenita De Lima Silva, Paula Ghedini Der Agopian, Joao Antonio Martino
Summary: This study presents the design of a Low Dropout Voltage Regulator (LDO) using Line-Tunnel Field Effect Transistor (Line-TFET), with the transistor modeled using Verilog-A and Lookup Table (LUT) obtained from experimental data. Despite having a lower Gain-BandWidth Product (GBW), the Line-TFET LDO delivers better results and higher efficiency compared to a MOSFET LDO, and can be designed without the need for compensation capacitor to achieve stability.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Rodrigo Do Nascimento Toledo, Joao Antonio Martino, Paula Ghedini Der Agopian
Summary: This work analyzes the application of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET in low-dropout voltage regulator (LDO) design. Three TFETs with different sources are examined. The results show that TFET-based LDOs are stable and have good frequency response without the need for compensator capacitors. However, the MOSFET LDO has lower efficiency and requires additional capacitors for stability.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Raphael Gil Camargo, Joao Antonio Martino, Paula Ghedini Der Agopian
Summary: This paper presents the temperature influence on OTA designed with triple gate TFET and verifies the impact of using a current mirror bias circuit with or without thermal compensation. The results suggest that TFET transistors have lower power consumption and higher voltage gain compared to conventional MOS transistors in this kind of circuit. Additionally, it is observed that using a current bias circuit with temperature compensation can slightly increase the total gain of the circuit.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Henrique L. Carvalho, Ricardo C. Rangel, Katia R. A. Sasaki, Paula G. D. Agopian, Leonardo S. Yojo, Joao A. Martino
Summary: This work presents the experimental and simulated characteristics of a reconfigurable (SOI)-S-BE MOSFET transistor with non-sintered aluminum contact for the first time. The transistor has a higher current for electrons without the sintering process, but doesn't have significant current for holes. This finding can be utilized to improve future implementations of the (SOI)-S-BE MOSFET.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Lucas Almir Dos Santos Fernandes, Marco Isaias Alayo, Joao Antonio Martino
Summary: A Monte Carlo analysis was conducted to investigate the influence of device fabrication mismatch on the fractal zone of a fractal tree structure in fractional-order MOS Capacitors. The results indicated that there was a reasonable deviation of 18% and -14% for a tolerance of 20% in the devices values, and for 2 sigma above and below the median values of the width and initial frequency value of the fractal zone, respectively, which accounted for over 90% of the samples.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Pedro H. Duarte, Ricardo C. Rangel, Daniel A. Ramos, Leonardo S. Yojo, Carlos A. B. Mori, Katia R. A. Sasaki, Paula G. D. Agopian, Joao A. Martino
Summary: This study presents the fabrication and electrical characterization of the Ion-Sensitive Field Effect Transistor (ISFET) exposed to hydrogen peroxide solutions. Two configurations were set up to evaluate the sensitivity of the devices to the concentration of the solution. The results show that using two electrodes in the sample solution provides a higher sensitivity compared to measurements with one electrode.
2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022)
(2022)
Article
Engineering, Electrical & Electronic
Franck Sabatier, Cedric Durand, Dominique Drouin, Michel Pioro-Ladriere, Fabien Ndagijimana, Philippe Galy
Summary: This study investigates the possibility of improving the quality factor and (or) inductance of an inductor integrated into CMOS technology by adding magnetic materials around it. The performance improvement is evaluated through 3D numerical simulations on an SOI substrate made in a 28 nm UTBB FDSOI technology. The choice of materials and their design topologies are the main parameters studied, leading to a solution selection based on the final application. The results show significant improvements in inductance and quality factor by using different design topologies and materials.
SOLID-STATE ELECTRONICS
(2024)
Article
Engineering, Electrical & Electronic
Tobias Reiter, Luiz Felipe Aguinsky, Francio Rodrigues, Josef Weinbub, Andreas Hoessinger, Lado Filipovic
Summary: Atomic layer processing (ALP) is a modern fabrication technique that allows precise control of film thickness, composition, and conformality at a nanometer scale. This article presents a model for surface coverage during ALD in the presence of desorption, leading to incomplete conformality. The model combines diffusion and kinetics methods and has been incorporated into topography simulators for accurate representation of reactor conditions.
SOLID-STATE ELECTRONICS
(2024)
Article
Engineering, Electrical & Electronic
Jingxuan Sun, Yi Han, Yannik Junk, Omar Concepcion, Jin-Hee Bae, Detlev Gruetzmacher, Dan Buca, Qing-Tai Zhao
Summary: This study systematically investigates the formation of NiGeSn and its contact resistivity with GeSn semiconductors. The optimal formation temperature of NiGeSn is found to be 325 degrees C, resulting in a lower contact resistivity on n-GeSn. The study also discusses the elemental diffusion mechanism during the NiGeSn formation. Additionally, GeSn exhibits low contact resistivity at 5 K, making it valuable for optimizing contact technologies for low-power and cryogenic applications.
SOLID-STATE ELECTRONICS
(2024)
Review
Engineering, Electrical & Electronic
Daniela Dragoman, Mircea Dragoman
Summary: Graphene's unique properties have led to the exploration of its analogies in various solid-state structures and systems, enabling the observation of novel phenomena and revealing differences in behavior between different systems. This review highlights the value of using analogies to develop new devices and expand our understanding of physics.
SOLID-STATE ELECTRONICS
(2024)
Article
Engineering, Electrical & Electronic
Sumreti Gupta, Asifa Amin, Reinaldo A. Vega, Abhisek Dixit
Summary: The multifrequency capacitance-voltage characteristics of high-k HfO2-based 10-nm bulk n-channel FinFETs were studied in this work. The dispersion observed in the accumulation region with respect to temperature was found to be influenced by the substrate time constant. Multifrequency conductance measurements and the variation in the surface potential quotient of the accumulation region were used to investigate the effect of direct tunneling current. Modifications to the existing accumulation region compact model equations were proposed.
SOLID-STATE ELECTRONICS
(2024)
Article
Engineering, Electrical & Electronic
N. Vasileiadis, A. Mavropoulis, I. Karafyllidis, G. Ch. Sirakoulis, P. Dimitrakis
Summary: In this work, we fabricate crossbar arrays of silicon nitride resistive memories on silicon-on-insulator substrate and utilize them to realize multi-ratioed logic circuits. The electrical characterization of the memristors shows their ability of multi-state operation with 12 distinct resistance levels. Based on a dedicated modeling and fitting procedure, a reconfigurable logic based on memristor rationed logic scheme is designed and a crossbar integration methodology is proposed. Furthermore, circuitry aspects are simulated with a calibrated model and power optimization prospects are discussed.
SOLID-STATE ELECTRONICS
(2024)
