期刊
NEUROCOMPUTING
卷 72, 期 16-18, 页码 3609-3616出版社
ELSEVIER
DOI: 10.1016/j.neucom.2008.12.036
关键词
Spiking neurons; Spike-timing-dependent plasticity; Reconfigurable neuromorphic arrays; On-chip learning
资金
- Engineering and Physical Sciences Research Council (EPSRC)
- University of Edinburgh [EP/C015789/1]
- EPSRC [EP/G063710/1] Funding Source: UKRI
- Engineering and Physical Sciences Research Council [EP/G063710/1, EP/C015789/1] Funding Source: researchfish
A generic programmable spike-timing based circuit which forms the building block of a reconfigurable neuromorphic array is implemented in analog VLSI. An array of programmable spike time event coded circuit blocks is configured to implement functional circuit blocks of a spike time based neuromorphic model. A reconfigurable neuromorphic array chip with 10 event blocks is fabricated using Austria Microsystems 0.35 mu m CMOS technology to demonstrate the functionality of the circuits in silicon. (C) 2009 Elsevier B.V. All rights reserved.
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