4.8 Article

Double-Balanced Graphene Integrated Mixer with Outstanding Linearity

期刊

NANO LETTERS
卷 15, 期 10, 页码 6677-6682

出版社

AMER CHEMICAL SOC
DOI: 10.1021/acs.nanolett.5b02503

关键词

Graphene; mixer; integrated circuit; RE electronics

资金

  1. National Basic Research Program [2013CBA01604]
  2. National Natural Science Foundation [61474072]
  3. National Science and Technology Major Project [2011ZX02707]

向作者/读者索取更多资源

A monolithic double-balanced graphene mixer integrated circuit (IC) has been successfully designed and fabricated. The IC adopted the cross-coupled resistive mixer topology, integrating four 500 nm-gate-length graphene field-effect transistors (GFETs), four on-chip inductors, and four on-chip capacitors. Passive-first-active-last fabrication flow was developed on 200 mm CMOS wafers. CMOS back-end-of-line processes were utilized to realize most fabrication steps followed by GFET-customized processes. Test results show excellent output spectrum purity with suppressed radio frequency (RE) and local oscillation (LO) signals feedthroughs, and third-order input intercept (IIP3) reaches as high as 21 dBm. The results are compared with a fabricated single-GEFT mixer, which generates IIP3 of 16.5 dBm. Stand-alone 500 nm-gate-length GFETs feature cutoff frequency 22 GHz and maximum oscillation frequency 20.7 GHz RE performance. The double-balanced mixer IC operated with off-chip baluns realizing a print-circuit-board level electronic system. It demonstrates graphene's potential to compete with other semiconductor technologies in RE front-end applications.

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