From DSM-Based Planning to Design Process Simulation: A Review of Process Scheme Logic Verification Issues

出版年份 2009 全文链接

标题

作者

关键词

出版物

Volume 56, Issue 4, Pages 636-649

出版商

Institute of Electrical and Electronics Engineers (IEEE)

发表日期

2009-10-09

DOI

10.1109/tem.2009.2032032

Explore over 38,000 international journals covering a vast array of academic fields.

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started