Article
Engineering, Electrical & Electronic
Mahdi Vadizadeh
Summary: A GaAs/InAs/Ge junctionless tunnel field-effect transistor (JL-TFET) device with a dual-material gate (DMG) structure is proposed in this article, showing improved performance parameters compared to traditional devices and offering potential for significant impact in digital applications.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Engineering, Electrical & Electronic
Ankush Chattopadhyay, Chayanika Bose
Summary: This paper focuses on modeling and examining the suitability of a stacked-gate core-shell junctionless DG-FET for low-power applications. Analytical modeling is used to determine various parameters, and the results match those obtained from device simulation. Comparative analysis shows that the C-S-JL-FET has the largest figures of merit and offers maximum bandwidth and gain.
JOURNAL OF ELECTRONIC MATERIALS
(2023)
Article
Chemistry, Physical
Yograj Singh Duksh, Balraj Singh, Deepti Gola, Pramod Kumar Tiwari, Satyabrata Jit
Summary: This paper presents 2-D analytical models for GC-DG JLFETs, solving the 2-D Poisson's equation to determine the channel central potential and calculating threshold voltage, subthreshold current, and subthreshold swing. The validity of the model results is confirmed using TCAD numerical data obtained from a 2-D ATLAS device simulator from Silvaco.
Article
Engineering, Electrical & Electronic
William Cheng-Yu Ma, Cai-Jia Tsai
Summary: The independent dual-gate operation improves performance and reliability of the JL-TFT, but may also cause more serious damages. The back gate voltage operation mode provides a wide threshold voltage tuning range, but it is important to note that positive top gate voltage stress may lead to more serious reliability issues.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Physics, Condensed Matter
Ankush Chattopadhyay, Chandan K. Sarkar, Chayanika Bose
Summary: This paper presents a compact analytical model for the underlap gate stack graded channel junction accumulation mode junctionless FET. The optimal scheme is determined through comparative analysis and further analysis is conducted using a 2D analytical model. The results from the analytical model and simulations show excellent agreement, demonstrating the outstanding ability of the proposed structure to shield short channel effects without compromising performance.
SUPERLATTICES AND MICROSTRUCTURES
(2022)
Article
Engineering, Electrical & Electronic
Shelja Kaushal, Ashwani K. Rana
Summary: In this article, an analytical model for subthreshold drain current in NC-JL FinFET is developed, taking into account the negative capacitance effect. The model is in good agreement with numerical simulations and shows that NC-JL FinFET improves subthreshold current and SS significantly compared to JL FinFET.
MICROELECTRONICS JOURNAL
(2022)
Article
Engineering, Electrical & Electronic
Min Soo Bae, Ilgu Yun
Summary: This article introduces a compact quantum threshold voltage shift model for a junctionless quadruple-gate FET in the subthreshold region. By calculating electron density and energy levels, the quantum Vth shift model is established. Validation through numerical simulation shows the model accurately captures quantum effects in JL QG FETs for use in circuit simulations.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Engineering, Electrical & Electronic
Manish Gupta, Vita Pi-Ho Hu
Summary: This work conducts sensitivity analysis of negative-capacitance junctionless transistors and compares their performance with conventional junctionless devices. The study shows that negative-capacitance junctionless transistors can effectively reduce off-current degradation and improve on-current in certain parameter variations, making them suitable for high-performance applications.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Engineering, Electrical & Electronic
Parveen Kumar, Balwinder Raj
Summary: This paper investigates a symmetrical design of a Junctionless Nanowire Tunnel-Field-Effect-Transistor (JLNWTFET) for highly sensitive biosensor applications. The JLNWTFET utilizes the Gate-All-Around (GAA) structure and Dielectric-Modulation (DM) technique to detect various biological molecules. The sensitivity parameters such as drain current, subthreshold slope, transconductance, and I-ON/I-OFF ratio are considered to evaluate the performance of the JLNWTFET in detecting different biological molecules in the cavity area.
MICROELECTRONICS JOURNAL
(2023)
Article
Engineering, Electrical & Electronic
Yi-Wen Lin, Hao-Hsiang Chang, Yu-Hsien Huang, Chong-Jhe Sun, Siao-Cheng Yan, Shan-Wen Lin, Guang-Li Luo, Chien-Ting Wu, Yung-Chun Wu, Fu-Ju Hou
Summary: The proposed use of tightly stacked diamond-shaped Ge nanowire gate-all-around field-effect transistors shows high performance and superior gate control for sub-3nm node applications, making it a feasible approach for continuous scaling in CMOS technology platforms.
IEEE ELECTRON DEVICE LETTERS
(2021)
Article
Engineering, Electrical & Electronic
Yuqin Xia, Lu Liu, Xinge Tao, Yuying Tian, Jing-Ping Xu
Summary: In this work, negative-capacitance field-effect transistors (NCFETs) based on Hf1-xAlxOy ferroelectric films were fabricated, and the effects of the Al content in Hf1-xAlxOy films and the thicknesses of the ferroelectric Hf1-xAlxOy layer/Al2O3 match layer on the electrical properties of the NCFETs were investigated. The results showed that by decreasing the Al content and increasing/decreasing the thicknesses of the ferroelectric layer/the match layer, the gate-stack of Hf1-xAlxOy/Al2O3 exhibited a larger remanent polarization intensity, and the subthreshold swing (SS) and total hysteresis of the NCFETs were reduced. The optimized device performance was achieved using Hf0.95Al0.05Oy ferroelectric film with a thickness of 10 nm and Al2O3 match layer with a thickness of 2 nm, resulting in a low SS of 35.4 mV/dec, high ON/OFF current ratio of 5.0 x 10(6), and negligible hysteresis of 36.2 mV. The enhanced ferroelectricity of Hf1-xAlxOy films and the good matching between the ferroelectric capacitance and MOS capacitance of devices under suitable structure and process parameters contributed to these improvements.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2023)
Article
Engineering, Electrical & Electronic
Khalil Tamersit, Mohammad Khaleqi Qaleh Jooq, Mohammad Hossein Moaiyeri
Summary: This article presents a computational investigation on nanoscale coaxial-gate negative-capacitance carbon nanotube field-effect transistor (NC CNTFET) with a metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structure. The study shows that the negative capacitance behavior of the ferroelectric layer can effectively boost the performance of the NC CNTFET in terms of subthreshold swing, drain-induced barrier lowering, ON-current, current ratio, and intrinsic delay. Moreover, thicker ferroelectric layers are found to improve the performance of the NC CNTFET, making it a potential candidate for modern CNT-based nanoelectronics.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Chemistry, Physical
Mahsa Mehrad, Meysam Zareiee
Summary: A modified junctionless transistor with a pi-shape silicon window in the buried oxide is proposed to effectively control off-current and improve device performance. The novel Silicon Region Junctionless MOSFET (SR-JMOSFET) demonstrates reduced off-current, acceptable on current, and controlled short channel effects compared to Conventional Junctionless MOSFET (C-JMOSFET). Additionally, replacing silicon dioxide with silicon material in the buried oxide reduces maximum temperature in the channel region, leading to better thermal management.
Article
Engineering, Electrical & Electronic
Wonjun Shin, Ryun-Han Koo, Sangwoo Kim, Dongseok Kwon, Jae-Joon Kim, Daewoong Kwon, Jong-Ho Lee
Summary: This study proposes a novel low-frequency noise measurement method to investigate the origin of threshold voltage instability in junctionless ferroelectric field-effect transistors (JL FeFETs). Depending on the delay time and the number of program/erase cycles, it is found that different types of traps (ferroelectric/dielectric interface trap, ferroelectric bulk trap, and dielectric bulk trap) are responsible for the V-th instability.
IEEE ELECTRON DEVICE LETTERS
(2023)
Article
Chemistry, Physical
Raj Kumar, Arvind Kumar
Summary: This paper proposed a Hetero-Dielectric (HD) Oxide-Engineered Junctionless double gate all around nanotube (DGAA-NT) FET for enhancing performance in low power circuits. Compared to JL-DGAA-NT FET, the HD-JL-DGAA-NT FET has increased tunnelling width and source-to-channel barrier height, leading to reduced leakage current and improved I-ON/I(OFF) ratio. By adjusting design parameters and dielectric material, the device performance can be improved.
Article
Chemistry, Physical
Alessio Antolini, Eleonora Franchi Scarselli, Antonio Gnudi, Marcella Carissimi, Marco Pasotti, Paolo Romele, Roberto Canegallo
Summary: This paper conducted a comprehensive characterization of phase-change memory (PCM) cells and proposed strategies and algorithms to optimize their performance for analog in-memory computing applications. The results showed that multi-level cell conductance programming can effectively reduce the impact of undesired phenomena, making it suitable for analog in-memory computing applications.
Article
Engineering, Electrical & Electronic
Susanna Reggiani, Luigi Balestra, Antonio Gnudi, Elena Gnani, Giorgio Baccarani, Jagoda Dobrzynska, Jan Vobecky, Carlo Tosi
Summary: An electroactive passivation for high-voltage diodes with bevel termination using DLC films has been investigated. The influence of DLC properties on diode leakage current and breakdown voltage was studied through experiments and numerical simulations. The polarization effect in DLC material was observed, improving its performance as a passivation material.
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS
(2021)
Article
Computer Science, Information Systems
Matteo D'Addato, Alessia M. Elgani, Luca Perilli, Eleonora Franchi Scarselli, Antonio Gnudi, Roberto Canegallo, Giulio Ricotti
Summary: This article introduces a data-startable baseband logic circuit for nanowatt wake-up and data receivers, featuring a gated oscillator clock and data recovery circuit. The circuit clears phase misalignment between the data frontend and clock, allowing reception of long data streams, and includes a frequency calibration circuit to address limitations.
Article
Engineering, Electrical & Electronic
Federico Giuliano, Susanna Reggiani, Elena Gnani, Antonio Gnudi, Mattia Rossetti, Riccardo Depetro, Giuseppe Croce
Summary: A TCAD approach was used to investigate charge transport in thick amorphous silicon dioxide, focusing on the physical mechanisms and leakage currents under high electric field stress conditions. Validation of the proposed method was done through experimental characterization and numerical simulations, providing insights for the development of integrated galvanic insulators for future power applications.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Computer Science, Interdisciplinary Applications
Said Quqa, Alessio Antolini, Eleonora Franchi Scarselli, Antonio Gnudi, Andrea Lico, Marcella Carissimi, Marco Pasotti, Roberto Canegallo, Luca Landi, Pier Paolo Diotallevi
Summary: Smart devices for structural health monitoring with edge computing capabilities can reduce wireless transmission and power consumption. Phase change memory, as a potential solution for analog in-memory computing, is investigated for its application in structural health monitoring.
JOURNAL OF COMPUTING IN CIVIL ENGINEERING
(2022)
Article
Physics, Applied
Luigi Balestra, Elena Gnani, Susanna Reggiani
Summary: The effective masses of electrons in ScxAl1-xN and AlxGa1-xN, two potential wide bandgap materials for power and RF electronic applications, were calculated using density functional theory (DFT). The effective band structure of the alloys was extracted using the unfolding technique. It was found that the effective masses of AlGaN approximately follow the Vegard law, while the effective masses of ScAlN exhibit a non-monotonic change as a function of Sc concentration, requiring consistent DFT calculations for accurate prediction. The effective masses of ScAlN as a function of Sc content were reported for the first time in the range of 0 <= x <= 0.25.
JOURNAL OF APPLIED PHYSICS
(2022)
Article
Computer Science, Information Systems
Luigi Balestra, Franco Ercolano, Elena Gnani, Susanna Reggiani
Summary: Gallium Nitride (GaN) High-Electron Mobility Transistors (HEMTs) are excellent candidates for medium-high power and radio frequency applications. Understanding the high-field transport properties and hot-electron degradation mechanisms is crucial for device reliability. TCAD simulations provide a useful tool for this analysis.
Article
Engineering, Electrical & Electronic
Federico Giuliano, Susanna Reggiani, Elena Gnani, Antonio Gnudi, Mattia Rossetti, Riccardo Depetro
Summary: Recently, it has been found that there is a significant difference in the breakdown of thick amorphous silicon-dioxide capacitors for galvanic insulation under dc and ac stresses. The dominant mechanism is believed to be impact-ionization generation for thicknesses ranging from about 1 to 15 μm. The breakdown voltage is significantly degraded under ac stress, which requires a focused TCAD-based investigation to fully comprehend the involved physical mechanisms. Accurate TCAD predictions of the measured leakage current help validate the proposed model and provide a detailed understanding of the device breakdown regime.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2023)
Article
Engineering, Electrical & Electronic
L. Balestra, S. Reggiani, A. Gnudi, E. Gnani, J. Dobrzynska, J. Vobecky
Summary: This study focuses on the application of diamond-like carbon (DLC) layer in high power devices, investigating the impact of DLC layer on diode thermal performance through measuring diode leakage current and developing a predictive TCAD model.
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
(2021)