Leakage Characterization of 10T SRAM Cell

Device and Circuit Co-Design Robustness Studies in the Subthreshold Logic for Ultralow-Power Applications for 32 nm CMOS

(2010) Ramesh Vaddi et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Large-Scale SRAM Variability Characterization in 45 nm CMOS

(2009) Zheng Guo et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Understanding the Effect of Process Variations on the Delay of Static and Domino Logic

(2009) Massimo Alioto et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing

(2008) Azeez J. Bhavnagarwala et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

An Evaluation of the CMOS Technology Roadmap From the Point of View of Variability, Interconnects, and Power Dissipation

(2008) FrÉdÉric Boeuf et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits

(2008) Naveen Verma et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Characterization of a Novel Nine-Transistor SRAM Cell

(2008) Zhiyu Liu et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A single ended 6T SRAM cell design for ultra-low-voltage applications

(2008) Jawar Singh et al.   IEICE Electronics Express