Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems

出版年份 2009 全文链接

标题

Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems

作者

关键词

-

出版物

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Volume 28, Issue 7, Pages 966-978

出版商

Institute of Electrical and Electronics Engineers (IEEE)

发表日期

2009-06-17

DOI

10.1109/tcad.2009.2013287

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