A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist

出版年份 2014 全文链接

标题

作者

关键词

出版物

Volume 61, Issue 12, Pages 3416-3425

出版商

Institute of Electrical and Electronics Engineers (IEEE)

发表日期

2014-09-09

DOI

10.1109/tcsi.2014.2336531

Do you already have a recorded webinar? Grow your audience and get more views by easily listing your recording on Peeref.

Upload Now

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started