期刊
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
卷 55, 期 10, 页码 3160-3169出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2008.923430
关键词
Analog integrated circuits; event-based systems; neuromorphic engineering; winner-take-all circuits
资金
- EU [IST-2001-34124, FP6-2005-015803]
- ETH Research [TH-20/04-2]
We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function nonlinearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a decision or selection task. In this paper, we show a theoretical description of this WTA computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35-mu m CMOS process. The measured results of the WTA performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons.
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