Article
Computer Science, Information Systems
Van-Son Trinh, Jung-Dong Park
Summary: A high-performance X-band two-stage power amplifier was developed in 65-nm CMOS process using a transformer-based voltage combining technique. The amplifier achieved high output power and power gain under 1.2V supply voltage with a small chip size.
Article
Engineering, Electrical & Electronic
Jiaxiang Li, Yun Yin, Hang Chen, Jie Lin, Yicheng Li, Xianglong Jia, Zhen Hu, Ziyu Liu, Xiuyin Zhang, Hongtao Xu
Summary: This article presents a quadrature digital power amplifier (DPA) with IQ-reuse and Doherty techniques, along with an 8-way serial power combined transformer, for high output power and high efficiency. The DPA achieves peak power-added efficiency (PAE) of over 30% across a wide frequency range. For LTE 20MHz 64QAM signal, it achieves high average output power and average PAE at a low error vector magnitude (EVM) limit.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2023)
Article
Computer Science, Information Systems
Hyunjin Ahn, Kyutaek Oh, Ilku Nam, Ockgoo Lee
Summary: This paper presents a fully integrated linear power amplifier in a 65-nm CMOS process for mm-wave 5G applications, achieving high linear output power and high power-added efficiency. The proposed IMD3 cancellation method can support high-order modulation signals without increasing complexity and reduces the dependence on digital predistortion.
Article
Engineering, Electrical & Electronic
Masoud Pashaeifar, Leo C. N. de Vreede, Morteza S. Alavi
Summary: This article presents a wideband series-Doherty power amplifier (SDPA) for mm-wave 5G applications. The compact two-step impedance inverting-based series-Doherty power combiner provides broadband PBO efficiency enhancement. A post-silicon inter-stage passive validation approach is proposed to evaluate the mm-wave chip prototype. The SDPA is realized in a 40nm bulk CMOS and exhibits good performance under different PBO conditions.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2022)
Article
Engineering, Electrical & Electronic
Joe Bachi, Ayssar Serhan, Dang-Kien Germain Pham, Damien Parat, Pascal Reynier, Patricia Desgreys, Alexandre Giry
Summary: A new combiner analysis method for the design of Doherty Power Amplifiers (DPA) is proposed and validated through simulation and experimental realization. The PA achieves an output power of 32dBm and peak PAE of 51% under a 3.4V supply voltage with a 2.3GHz CW signal.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2022)
Article
Engineering, Electrical & Electronic
Kun-Da Chu, Steven Callender, Yanjie Wang, Jacques Christophe Rudell, Stefano Pellerano, Christopher Hull
Summary: This article introduces the design of a dual-mode V-band power amplifier that enhances efficiency at power back-off using load modulation. The power amplifier utilizes a reconfigurable power combiner to enable two discrete modes of operation and employs two techniques to further improve efficiency at back-off power.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2021)
Article
Engineering, Electrical & Electronic
Yu-Teng Chang, Kun-You Lin, Tzong-Lin Wu
Summary: In this article, a passive and active wideband reconfigurable power divider/power combiner for 5G millimeter-wave beamforming systems is proposed and implemented. The design achieves a wideband characteristic and reconfigurable function. Compared to other reconfigurable PDs/PCs and on-chip PDs, the proposed design demonstrates a wider bandwidth and a more compact area. Additionally, an active reconfigurable PD/PC is proposed, which shows a broader bandwidth, lower power consumption, and a compact die area compared to other active reconfigurable PDs/PCs.
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
(2022)
Article
Engineering, Electrical & Electronic
Jeng-Han Tsai
Summary: This letter presents a fully integrated CMOS power amplifier (PA) with a high-power built-in linearizer, operating at 5.3 GHz frequency with watt-level output power. By utilizing a transformer-based 2-stage dual-radial power splitting/combining structure, the CMOS PA achieves high output power. Additionally, a cascode cold-FET built-in linearizer with high power capacity is developed to enhance the linearity of the CMOS PA. Experimental results show that the CMOS PA achieves high linearity, with the highest P-linear and OP1dB among reported CMOS PAs around 5 GHz to date.
IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS
(2023)
Article
Computer Science, Information Systems
Kyu-Jin Choi, Jae-Hyun Park, Seong-Kyun Kim, Byung-Sung Kim
Summary: This paper presents the design and performance characteristics of a K-band CMOS differential cascode power amplifier, utilizing thin-oxide and thick-oxide FETs to achieve high supply voltage and output power. The gain degradation caused by the low cut-off frequency of the thick-oxide FET is compensated by its high output resistance when the inter-stage node is neutralized, leading to a high saturated output power and efficiency at 24 GHz frequency in the fabricated chip using 65-nm LP CMOS technology.
Article
Engineering, Electrical & Electronic
Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui P. Martins
Summary: The novel Wideband Pre-Distortion (WPD) mechanism is a linearization technique for bandwidth-limited CMOS power amplifiers, providing a flat gain response from 800 MHz to 3.3 GHz and maintaining good power efficiency throughout the band of operation.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2021)
Article
Engineering, Electrical & Electronic
Lang Chen, Lisheng Chen, Zeyu Ge, Yichuang Sun, Xi Zhu
Summary: In this work, a ten-way power-combined power amplifier is designed using a load modulated balanced amplifier (LMBA)-based architecture. The amplifier achieves high power and efficiency through unequal power splitting and phase compensation. The implementation in a 45-nm SOI CMOS process shows excellent performance, with the highest P-sat compared to other silicon-based LMBA designs.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2023)
Article
Engineering, Electrical & Electronic
Zonglin Ma, Zheng Ma, Kaixue Ma, Fanyi Meng, Keping Wang
Summary: This paper presents a 28-GHz high-power four-way differential Doherty power amplifier (PA) in 55-nm bulk CMOS technology. A transformer-based hybrid load-modulated combiner (HLMC) is proposed to achieve high output power, low-loss power combining, and a true-Doherty load modulation. The measured results show good performance in terms of output power, efficiency, and error vector magnitude (EVM) for 64-quadrature amplitude modulation (QAM) signals.
IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS
(2023)
Article
Chemistry, Multidisciplinary
Janne P. Aikio, Alok Sethi, Mikko Hietanen, Jere Rusanen, Timo Rahkonen, Aarno Parssinen
Summary: This paper presents a fully integrated, high-performance power amplifier for millimeter-wave wireless applications, with high gain and output power in a specific frequency range.
APPLIED SCIENCES-BASEL
(2021)
Article
Engineering, Electrical & Electronic
Hamed Mosalam, Wenbo Xiao, Xiaoyan Gui, Dan Li, Quan Pan
Summary: This paper presents a 54-68 GHz two-stage power amplifier with linearity and efficiency enhancement in a 40 nm CMOS process. The proposed structure and techniques achieve good experimental results in terms of linearity and efficiency.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2022)
Article
Chemistry, Multidisciplinary
Junhyuk Yang, Jaeyong Lee, Seongjin Jang, Hayeon Jeong, Choulyoung Kim, Changkun Park
Summary: In this study, a power amplifier structure with improved efficiency and high output power was proposed by investigating the characteristics of the common-source and stack structures. The designed Ku-band power amplifier, implemented using the 65-nm RF CMOS process, achieved high output power and power-added efficiency at 15 GHz operating frequency.
APPLIED SCIENCES-BASEL
(2022)
Article
Engineering, Electrical & Electronic
Kaizhe Guo, Patrick Reynaert
Summary: This paper presents an analysis method to study the harmonic current characteristics in the transistor of a high-frequency harmonic oscillator. The relationship between second harmonic voltages and fourth harmonic drain current is investigated, and the requirements for fourth harmonic boosting are determined. Additionally, a modeling approach is proposed to facilitate the design of the harmonic oscillator topology that meets the requirements for fourth harmonic boosting.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2022)
Article
Engineering, Electrical & Electronic
Nima Baniasadi, Ali M. Niknejad
Summary: This article revisits the concept of noise measure in designing high-frequency low-noise amplifiers, offering a simpler derivation than the original one by Haus and Adler. Several examples are used to calculate the minimum noise measure of a CMOS amplifier, and it is shown that noise cancellation techniques cannot improve it.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2022)
Article
Engineering, Electrical & Electronic
Ethan Chou, Lorenzo Iotti, Ali Niknejad
Summary: This paper presents the modeling and design of a static current-mode logic, divide-by-2 frequency divider for mm-wave frequency synthesis. An optimized design procedure based on the RC delay model and insights into the nonlinear mixing conversion gain of the injection-locking model are utilized to design an inductor-less 28-nm CMOS prototype that achieves high maximum input frequency and power-delay product.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2022)
Article
Engineering, Electrical & Electronic
Matthew Giorgis Anderson, Arno Thielens, Stijn Wielandt, Ali M. Niknejad, Jan M. Rabaey
Summary: This paper presents a method for low-power RF beamforming utilizing transmission-line transformers and balanced impedance phase shifters. The method offers advantages of low loss, simplicity, and scalability, and extends the beam-steering range through the introduction of a crossover switch.
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
(2022)
Article
Engineering, Electrical & Electronic
Kaizhe Guo, Patrick Reynaert
Summary: This article analyzes the required fundamental-frequency load impedance for third harmonic enhancement in a common source transistor. A harmonic power extractor (HPE) based on a differential substrate-integrated waveguide (SIW) is proposed to provide the required load impedance and enhance the third harmonic power generation. The article also explains the operation principle of the SIW-based HPE and details the design of a 0.52-THz CMOS radiating source.
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY
(2022)
Article
Engineering, Electrical & Electronic
Ariane De Vroede, Patrick Reynaert
Summary: This paper proposes a new approach for above-$f_{max}$ power detection using harmonic injection locking of a cross-coupled oscillator and the resulting change in oscillation amplitude. Theoretical framework and design of a receiver with a 200 GHz cross-coupled oscillator and a 600 GHz folded dipole antenna are discussed. The proposed receiver achieves a Noise Equivalent Power (NEP) of 2.3 pW/root Hz.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2022)
Article
Engineering, Electrical & Electronic
Luya Zhang, Ali M. Niknejad
Summary: This study presents a galvanically coupled electron paramagnetic resonance spectrometer (GalEPR) for deep tissue oximetry and hypoxia diagnosis. The GalEPR spectrometer achieves a frequency/depth of 14 GHz/50 mm, which is 10 times better than previous methods. This is achieved by galvanically coupling a 30 MHz clock through the body and up-converting it to 14 GHz using a low-power subsampling phase locked loop (SSPLL).
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2023)
Article
Engineering, Electrical & Electronic
Yiyang Wang, Haipeng Duan, Long He, Depeng Cheng, Xu Wu, Dongming Wang, Patrick Reynaert, Lianming Li
Summary: This brief introduces a high image rejection ratio (IRR) up-conversion mixer for 5G mmWave communication. The mixer utilizes a current-mode second-order tunable notch filter and a double-balanced passive mixer to achieve broadband IRR at mmWave frequency. It also introduces a capacitor-inductor-capacitor (C-L-C) p-type impedance network for better isolation and lower insertion loss. With these designs, the mixer achieves high IRR and good performance in the 36 to 40.6 GHz frequency range.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
(2023)
Article
Computer Science, Hardware & Architecture
Ariane De Vroede, Patrick Reynaert
Summary: Harmonic injection-locked receivers have demonstrated state-of-the-art above-$f_{\mathrm {max}}$ sensitivity in CMOS, making them an excellent choice for low power, compact THz imaging applications. When expanding from a single pixel into an array, mutual disturbance between on-chip oscillators must be avoided to maintain image quality. This letter studies and explores interleaved modulation techniques to mitigate this unwanted coupling.
IEEE SOLID-STATE CIRCUITS LETTERS
(2023)
Proceedings Paper
Computer Science, Hardware & Architecture
Ethan Chou, Nima Baniasadi, Hesham Beshary, Meng Wei, Emily Naviasky, Lorenzo Iotti, Ali Niknejad
Summary: This study presents a D-band receiver with integrated local oscillator generation and distribution, designed for digital beamforming arrays. The receiver achieves competitive performance and the highest level of integration among other D-band CMOS receiver wireless links.
ESSCIRC 2022- IEEE 48TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC)
(2022)
Proceedings Paper
Computer Science, Hardware & Architecture
Carl D'heer, Patrick Reynaert
Summary: This paper presents a 135 GHz direct-digital modulation 16-QAM transmitter with separate phase and amplitude modulation using a Cartesian architecture. The transmitter, implemented in 28nm CMOS, achieves a peak output power of 0 dBm. It can achieve a maximum data rate of 32 Gb/s with 16-QAM without any equalization or pulse shaping.
ESSCIRC 2022- IEEE 48TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC)
(2022)
Proceedings Paper
Computer Science, Hardware & Architecture
Carl D'heer, Patrick Reynaert
Summary: This paper presents a 135 GHz direct-digital demodulation 16-QAM receiver, which achieves efficient 16-QAM demodulation without needing a high-speed multi-bit ADC by combining a direct-conversion RF front-end with an analog PAM-4 decoder. Implemented in 28 nm CMOS, the receiver demonstrates a conversion gain of 25 dB and integrated DSB noise figure better than 10 dB. A 24 Gb/s 16-QAM signal was detected and directly demodulated on-chip with a power consumption of 175 mW.
ESSCIRC 2022- IEEE 48TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC)
(2022)
Proceedings Paper
Computer Science, Hardware & Architecture
Gabriel Guimaraes, Patrick Reynaert
Summary: This paper presents a pair of CMOS D-band transmitter and receiver ICs for mm-Wave spectroscopy systems. The TX has a wide operating frequency range and high peak EIRP, while the RX has high peak isotropic gain and low noise figure. A spectroscopy system demonstration is built using these ICs.
ESSCIRC 2022- IEEE 48TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC)
(2022)
Proceedings Paper
Computer Science, Artificial Intelligence
Ibrahim Kazi, Patrick Reynaert, Wim Dehaene
Summary: This article presents a phase rotator based architecture for clock recovery in NRZ wireline links. It introduces the use of a slow wave transmission line as a spatial buffer and demonstrates the feasibility of this concept through implementation in 40nm CMOS.
2022 20TH IEEE INTERREGIONAL NEWCAS CONFERENCE (NEWCAS)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Ariane De Vroede, Patrick Reynaert
Summary: The frequency scalability of self-mixing transistors with zero drain bias for THz power detection has been demonstrated. Measurements of individual patch-coupled detectors tuned at 0.56 and 1.06 THz show no sensitivity degradation when moving towards higher frequencies.
2021 46TH INTERNATIONAL CONFERENCE ON INFRARED, MILLIMETER AND TERAHERTZ WAVES (IRMMW-THZ)
(2021)