Vertical InGaAs/InP Tunnel FETs With Tunneling Normal to the Gate

Heterojunction Vertical Band-to-Band Tunneling Transistors for Steep Subthreshold Swing and High on Current

(2011) K Ganapathi et al.   IEEE ELECTRON DEVICE LETTERS

Leakage-Reduction Design Concepts for Low-Power Vertical Tunneling Field-Effect Transistors

(2010) Samarth Agarwal et al.   IEEE ELECTRON DEVICE LETTERS

$\hbox{In}_{0.7}\hbox{Ga}_{0.3}\hbox{As}$ Tunneling Field-Effect Transistors With an $I_{\rm on}$ of 50 $\mu\hbox{A}/\mu\hbox{m}$ and a Subthreshold Swing of 86 mV/dec Using $\hbox{HfO}_{2}$ Gate Oxide

(2010) Han Zhao et al.   IEEE ELECTRON DEVICE LETTERS

Temperature-Dependent $I$– $V$ Characteristics of a Vertical $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ Tunnel FET

(2010) Saurabh Mookerjea et al.   IEEE ELECTRON DEVICE LETTERS

Modeling of High-Performance p-Type III–V Heterojunction Tunnel FETs

(2010) J. Knoch et al.   IEEE ELECTRON DEVICE LETTERS

A Binary Tunnel Field Effect Transistor with a Steep Sub-threshold Swing and Increased ON Current

(2010) Ram Asra et al.   JAPANESE JOURNAL OF APPLIED PHYSICS

Low-Voltage Tunnel Transistors for Beyond CMOS Logic

(2010) Alan C. Seabaugh et al.   PROCEEDINGS OF THE IEEE