4.6 Article

Closed-Form Expressions for the Resistance and the Inductance of Different Profiles of Through-Silicon Vias

期刊

IEEE ELECTRON DEVICE LETTERS
卷 32, 期 3, 页码 393-395

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2099203

关键词

Closed-form expressions; parasitic resistance and inductance; through-silicon vias (TSVs)

资金

  1. National S&T Major Project of China [2009ZX03006-001-01]
  2. National Basic Research Program of China (973 Program) [2010CB732606]

向作者/读者索取更多资源

In this letter, closed-form expressions are proposed to calculate the parasitic resistance and inductance of different profiles of through-silicon vias (TSVs). The formulas for the tapered TSV are developed as the functions of the geometric parameters of the via. The expressions also cover the straight TSV when the slope wall angle is zero. The comparison between the formulas and numerical electromagnetic results shows that the formulas have high accuracy at low frequency, with maximum errors of 2% and 5% for the resistance and the inductance, respectively. The errors increase at high frequencies due to the skin effect and can be minimized by using fitting parameters.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.6
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据