期刊
IEEE ELECTRON DEVICE LETTERS
卷 31, 期 10, 页码 1137-1139出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2061834
关键词
Coplanar homojunction; low-voltage transistors; self-assembled channel
资金
- National Natural Science Foundation of China [10874042]
- Foundation for the Author of National Excellent Doctoral Dissertation of China [200752]
- Natural Science Foundation of Zhejiang province [0804201051]
A self-assembling diffraction method is developed for low-voltage coplanar homojunction thin-film transistor (TFT) fabrication. In this one-shadow-mask process, a channel layer can be simultaneously self-assembled between indium-tin-oxide (ITO) source/drain electrodes during magnetron sputtering deposition. When a microporous SiO2-based solid electrolyte is used as the gate dielectric, full-depletion-mode ITO TFTs show an ultralow operation voltage of 1.5 V due to the large specific capacitance (4.44 mu F/cm(2)). A small subthreshold swing of 0.12 V/decade and a large on/off ratio of 10(6) are obtained. Our results demonstrate that such a simple one-mask self-assembling method is promising for low-cost TFT fabrication.
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