Objective:
Artificial Intelligence (AI) is becoming increasingly important for most defence capabilities. However, the energy consumption of AI implemented on classical processors limits its practical usage, especially for embedded systems and edge computing. Indeed, existing processors are far from optimal for most AI applications in terms of efficiency and energy consumption, due to their architecture (digital representation of information, separation of memory and computing). While this issue has been overridden for decades by the steady technological progress of these processors in terms of miniaturisation and performance following Moore’s law, this trend is reaching its limit, and the need to move to dedicated architectures is coming to the fore.
In particular, moving from digital to analogue computing has the potential to improve computing in terms of speed and/or energy-efficiency by several orders of magnitude (expectedly by a factor of at least thousands). Furthermore, it can benefit from the increasing versatility of artificial neural networks to address a variety of AI applications. In addition, it offers enhanced security by coding the information in a way that strongly limits information leaks, as this information is deeply intertwined with the processing hardware. Besides, sensing functionalities can be integrated into analogue processors to produce very low power consumption smart sensors or to increase the frequency range of radiofrequency signals that can be processed.
In addition, this is an emerging technological domain within the field of processors where competition is relatively open and where there is an opportunity to build on European competencies.
The goal of the topic is thus to create new types of processors for AI that offer very significant performance gains for defence applications, and to develop European supply chains offering a technological autonomy for these technologies.
Scope:
The proposals must address research on new hardware architectures for AI that offer very significant gains in term of power consumption, processing speed and latency, as well as in terms of size, weight and cost. Any type of architecture deemed suitable to address the objectives may be investigated (e.g. magnetic tunnel junctions (MTJ), memristors, in-memory computing, etc., possibly combined with other relevant hardware and software technologies in hybrid architectures).
Types of activities
The following table lists the types of activities which are eligible for this topic, and whether they are mandatory or optional (see Article 10(3) EDF Regulation):
| Types of activities (art 10(3) EDF Regulation) | Eligible? |
| (a) | Activities that aim to create, underpin and improve knowledge, products and technologies, including disruptive technologies, which can achieve significant effects in the area of defence (generating knowledge) | Yes(optional) |
| (b) | Activities that aim to increase interoperability and resilience, including secured production and exchange of data, to master critical defence technologies, to strengthen the security of supply or to enable the effective exploitation of results for defence products and technologies (integrating knowledge) | Yes(optional) |
| (c) | Studies, such as feasibility studies to explore the feasibility of new or upgraded products, technologies, processes, services and solutions | Yes(mandatory) |
| (d) | Design of a defence product, tangible or intangible component or technology as well as the definition of the technical specifications on which such a design has been developed, including any partial test for risk reduction in an industrial or representative environment | Yes(mandatory) |
| (e) | System prototyping of a defence product, tangible or intangible component or technology | No |
| (f) | Testing of a defence product, tangible or intangible component or technology | No |
| (g) | Qualification of a defence product, tangible or intangible component or technology | No |
| (h) | Certification of a defence product, tangible or intangible component or technology | No |
| (i) | Development of technologies or assets increasing efficiency across the life cycle of defence products and technologies | No |
The proposals must cover at least the following tasks as part of the mandatory activities:
- Studies:
- study of new processing architectures and their physical implementation;
- Design:
- design and small-scale fabrication of such innovative processors;
- integration in technology demonstrators, and measurement of performances on AI data and tasks relevant for defence applications.
The proposals should describe how synergies and complementarities with activities funded by other sources of funding, including civil ones such as Horizon Europe, are sought and maximised.
Functional requirements
The proposed solutions should meet the following functional requirements:
- They should offer very significant gains over classical hardware architectures in terms of computing power (speed and/or energy efficiency) and compactness (size, weight and cost), including for complete systems (e.g. including thermal dissipation management). The gains are expected to be of several orders of magnitude. The proposals should clearly describe and justify the expected gains;
- These gains should be measured on well-identified defence AI use cases, with clear metrics and on data sets that are representative of military mission profiles. The proposals should describe clearly these use cases, metrics and data. They should also describe how the absence of bias in the measurements and comparability with state-of-the-art approaches can be ensured;
- Solutions addressing the detection and recognition of radiofrequency signals should address frequencies up to several tens of GHz.
Expected Impact:
The outcome should contribute to:
- the ability to integrate high-end AI features into various embedded defence equipment while offering reasonable battery life and at a reasonable cost;
- enhanced security of AI-based systems;
- strengthened European supply chains and technological autonomy in the domain of high-efficiency computing and processors for AI.
